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2017
1 Fraser, Nicholas J.; Umuroglu, Yaman; Gambardella, Giulio; Blott, Michaela; Leong, Philip W.; Vissers, Kees; Jahre, Magnus.
Scaling Binarized Neural Networks on Reconfigurable Logic. I: Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms. Association for Computing Machinery (ACM) 2017 ISBN 978-1-4503-4877-5. s. 25-30
NTNU Untitled
 
2 Umuroglu, Yaman; Fraser, Nicholas J.; Gambardella, Giulio; Blott, Michaela; Leong, Philip W.; Jahre, Magnus; Vissers, Kees.
FINN: A Framework for Fast, Scalable Binarized Neural Network Inference. I: Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. Association for Computing Machinery (ACM) 2017 ISBN 978-1-4503-4354-1. s. 65-74
NTNU Untitled
 
3 Umuroglu, Yaman; Jahre, Magnus.
Work-in-Progress: Towards Efficient Quantized Neural Network Inference on Mobile Devices. I: 2017 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES). Association for Computing Machinery (ACM) 2017 ISBN 978-1-4503-5184-3.
NTNU Untitled
 
2016
4 Umuroglu, Yaman; Jahre, Magnus.
Random access schemes for efficient FPGA SpMV acceleration. Microprocessors and microsystems 2016 ;Volum 47B. s. 321-332
NTNU Untitled
 
2015
5 Brandslet, Steinar; Umuroglu, Yaman; Tufte, Gunnar.
Tre måneder på å gjøre det umulige. Gemini 2015
NTNU Untitled
 
6 Umuroglu, Yaman; Jahre, Magnus.
A Vector Caching Scheme for Streaming FPGA SpMV Accelerators. I: Applied Reconfigurable Computing. Springer 2015 ISBN 978-3-319-16213-3. s. 15-26
NTNU Untitled
 
7 Umuroglu, Yaman; Morrison, Donn; Jahre, Magnus.
Hybrid Breadth-First Search on a Single-Chip FPGA-CPU Heterogeneous Platform. I: 25th International Conference on Field Programmable Logic and Applications, FPL 2015, London, United Kingdom, September 2-4, 2015. IEEE conference proceedings 2015 ISBN 978-0-9934-2800-5. s. -
NTNU Untitled
 
2014
8 Umuroglu, Yaman; Jahre, Magnus.
An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators. I: 2014 32nd IEEE International Conference on Computer Design (ICCD). IEEE 2014 ISBN 978-1-4799-6492-5. s. 432-439
NTNU Untitled
 
9 Umuroglu, Yaman; Jahre, Magnus.
An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators. IEEE International Conference on Computer Design; 2014-10-19 - 2014-10-22
NTNU Untitled
 
10 Umuroglu, Yaman; Jahre, Magnus.
Memory-Centric Design for FPGA SpMV Accelerators. I: ACACES 2014: poster abstracts. : HiPEAC 2014 ISBN 9788890580628. s. 9-12
NTNU Untitled
 
11 Umuroglu, Yaman; Jahre, Magnus.
Memory-Centric Design for FPGA SpMV Accelerators. International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems; 2014-07-13 - 2014-07-19
NTNU Untitled