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2019
1 Aunet, Snorre.
Asynchronous ultra low voltage / low power CMOS - what and why, but not much about how.. No.133 Asynchronous Circuit Design and Its Applications: Past, Present and Future; 2019-05-15 - 2019-05-19
NTNU Untitled
 
2 Zadeh, Somayeh Hossein; Ytterdal, Trond; Aunet, Snorre.
Low Energy CMOS building blocks for IoT. lunchforedrag, gruppen for Krets- og radiosystemer; 2019-06-28 - 2019-06-28
NTNU Untitled
 
3 Zadeh, Somayeh Hossein; Ytterdal, Trond; Aunet, Snorre.
Low Energy CMOS building blocks for IoT. 10th annual workshop, Norwegian PhD Network on Nanotechnology for Microsystems; 2019-06-17 - 2019-06-19
NTNU Untitled
 
2018
4 Aunet, Snorre.
Possibilities with ultra low power / low energy integrated circuits. IEEE Norway Section Annual General Meeting 2018; 2018-12-11 - 2018-12-11
NTNU Untitled
 
5 Choe, Ju Song.
Test system design for a Photomultiplier Readout Board. Trondheim: NTNU 2018 219 s.
NTNU Untitled
 
6 Hossein Zadeh, Somayeh; Ytterdal, Trond; Aunet, Snorre.
Comparison of Ultra Low Power Full Adder Cells in 22 nm FDSOI Technology. I: Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEE 2018 ISBN 978-1-5386-7656-1. s. -
NTNU Untitled
 
7 Låte, Even; Ytterdal, Trond; Aunet, Snorre.
A loadless 6T SRAM cell for sub- & near- threshold operation implementedin 28 nm FD-SOI CMOS technology. Integration 2018 ;Volum 63. s. 56-63
NTNU Untitled
 
8 Paldas, Auritro.
Towards Predictable Placement of Standard Cells for Regularly Structured Designs. Trondheim: NTNU 2018 75 s.
NTNU Untitled
 
9 Rørstad Helle, Even.
Humidity Sensor. Trondheim: NTNU 2018 90 s.
NTNU Untitled
 
10 Stubsjøen, Sivert.
Force measurement using a capacitive sensor and a compressible material. Trondheim: NTNU 2018 38 s.
NTNU Untitled
 
11 Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
An Ultra-Low Voltage and Low-Energy Level Shifter in 28 nm UTBB-FDSOI. IEEE Transactions on Circuits and Systems - II - Express Briefs 2018 ;Volum 66.(6) s. 899-903
NTNU Untitled
 
12 Østerhus, Stian.
Subthreshold CMOS Cell Library by 22 nm FDSOI Technology. Trondheim: NTNU 2018 177 s.
NTNU Untitled
 
2017
13 Aunet, Snorre.
Introduction to ultra-low power electronic circuits design. WIBEC (Horizon 2020 project) training school - selected topics in Electronics, Communication, and Sensing; 2017-10-17 - 2017-10-17
NTNU Untitled
 
14 Aunet, Snorre.
Introduction to ultra-low power electronic circuits design. invitert foredrag; 2017-11-03 - 2017-11-03
NTNU Untitled
 
15 Aunet, Snorre.
Introduction to ultra-low power electronic circuits design. invitert foredrag; 2017-11-03 - 2017-11-03
NTNU Untitled
 
16 Aunet, Snorre.
Ultra-low power electronic circuits for medical applications. WIBEC (Horizon 2020 project) training school - selected topics in Electronics, Communication, and Sensing; 2017-10-17 - 2017-10-17
NTNU Untitled
 
17 Hasanbegovic, Amir.
Exploring the SEU Dependence on Supply Voltage scaling in 90 nm and 65 nm CMOS Flip-flops. : Universitetet i Oslo 2017 108 s.
UiO Untitled
 
18 Lesund, Martin.
Ultra-low power serial communication for Internet of Things. Gløshaugen: NTNU 2017 122 s.
NTNU Untitled
 
19 Lid, Gunnar.
Ultra-low power Design of DSRC modulator/demodulator in 28nm FD_SOI. Gløshaugen: NTNU 2017 70 s.
NTNU Untitled
 
20 L'Orange, Simon.
4-7Ghz Tunable Programmable Pulse Generator in 65nm CMOS. NTNU, Trondheim: NTNU 2017 54 s.
NTNU Untitled
 
21 Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
Extended Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28 nm FD-SOI. Microprocessors and microsystems 2017 ;Volum 48. s. 11-20
NTNU Untitled
 
22 Tørresen, Jim; Aunet, Snorre.
Special issue: Selected papers from the 1st NORCAS conference (2015 Nordic Circuits and Systems Conference (NORCAS): Norchip & International Symposium on System-on-Chip (SoC)). Microprocessors and microsystems 2017 ;Volum 48. s. 1-2
NTNU UiO Untitled
 
23 Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond; Aunet, Snorre.
Ultra-Low Voltage and Energy Efficient Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing. Microprocessors and microsystems 2017 ;Volum 56. s. 92-100
NTNU Untitled
 
24 Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
Ultra-Low Voltage/Energy CMOS Building Blocks in 28 nm FDSOI Technology. 8th NanoNetwork annual workshop; 2017-06-12 - 2017-06-14
NTNU UiO Untitled
 
2016
25 Aunet, Snorre; Tørresen, Jim.
Special issue: selected papers from the 1st NORCAS conference (2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium on System-on-Chip (SoC)). Analog Integrated Circuits and Signal Processing 2016 ;Volum 89.(2) s. 271-272
UiO Untitled
 
26 Barua, Anomadarshi.
Voice over mesh network. Trondheim: NTNU 2016 137 s.
NTNU Untitled
 
27 Hasanbegovic, Amir; Aunet, Snorre.
Heavy Ion Characterization of Temporal-, Dual- and Triple Redundant Flip-Flops Across a Wide Supply Voltage Range in a 65 nm Bulk CMOS Process. IEEE Transactions on Nuclear Science 2016 ;Volum 63.(6) s. 2962-2970
NTNU UiO Untitled
 
28 Kvam Oma, Åsmund.
Design of a near-threshold microcontroller. Trondheim: NTNU 2016 77 s.
NTNU Untitled
 
29 Liknes, Kai Robert.
Ultra Low Leakage Memory. Trondheim: NTNU 2016 78 s.
NTNU Untitled
 
30 Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond; Aunet, Snorre.
Ultra-Low Voltage Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing. IEEE Nordic Conference on Circuits and Systems; 2016-11-01 - 2016-11-02
NTNU Untitled
 
31 Vatanjou, Ali Asghar; Låte, Even; Ytterdal, Trond; Aunet, Snorre.
Ultra-Low Voltage Adders in 28 nm FDSOI Exploring Poly-Biasing for Device Sizing. I: Proceedings of the 2nd IEEE Nordic Circuits and Systems Conference (NORCaS), 2016. IEEE conference proceedings 2016 ISBN 978-1-5090-1095-0. s. -
NTNU Untitled
 
32 Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block. I: Proceedings of the 23rd International Conference - "Mixed Design of Integrated Circuits and Systems" (MIXDES), Lodz, Poland. IEEE conference proceedings 2016 ISBN 9788363578084. s. 105-110
NTNU Untitled
 
33 Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
28 nm UTBB-FDSOI energy efficient and variation tolerant custom digital-cell library with application to a subthreshold MAC block. "Mixed Design of Integrated Circuits and Systems" (MIXDES).; 2016-06-23 - 2016-06-25
NTNU Untitled
 
2015
34 Atarzadeh, Hourieh; Aunet, Snorre; Ytterdal, Trond.
An Ultra-Low-Power/High-Speed 9-bit Adder Design: Analysis and Comparison Vs. Technology from 130nm-LP to UTBBFD-SOI-28nm. I: Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings 2015 ISBN 978-1-4673-6576-5. s. -
NTNU Untitled
 
35 Atarzadeh, Hourieh; Aunet, Snorre; Ytterdal, Trond.
An Ultra-Low-Power/High-Speed 9-bit Adder Design: Analysis and Comparison Vs. Technology from 130nm-LP to UTBBFD-SOI-28nm. 1st NORCaS Conference; 2015-10-26 - 2015-10-28
NTNU Untitled
 
36 Aunet, Snorre.
Ultra Low Power / Low Energy Integrated Circuits. Nano Matchmaking Seminar; 2015-06-02 - 2015-06-02
NTNU Untitled
 
37 Aunet, Snorre.
Ultra Low-Voltage / Low energy circuits. invited guest lecture; 2015-01-28 - 2015-01-28
NTNU Untitled
 
38 By, Mathias.
FPGA Implementation and Evaluation of a Genetic Algorithm for Digital Adaptive Nulling using Space-Time Adaptive Processing.. Trondheim: NTNU 2015 83 s.
NTNU Untitled
 
39 Hals, Erik.
Lav effekt sensornettverk, for registrering av kjøretøy. Gløshaugen, Trondheim: NTNU 2015 41 s.
NTNU Untitled
 
40 Hasanbegovic, Amir; Aunet, Snorre.
Supply Voltage Dependency on the Single Event Upset Susceptibility of Temporal Dual-Feedback Flip-Flops in a 90 nm Bulk CMOS Process. IEEE Transactions on Nuclear Science 2015 ;Volum 62.(4) s. 1888-1897
NTNU UiO Untitled
 
41 Holen, Aslak Lykre.
Implementation and Comparison of Digital Arithmetics for Low Voltage / Low Energy Operation. Trondheim: NTNU 2015 125 s.
NTNU Untitled
 
42 Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28nm FDSOI. I: Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings 2015 ISBN 978-1-4673-6576-5. s. -
NTNU Untitled
 
43 Låte, Even; Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28nm FDSOI. 1st NORCaS Conference; 2015-10-26 - 2015-10-28
NTNU Untitled
 
44 Pedersen, Arne Olav Gurvin.
Design of an ASIC Evaluation Kit - Conceptualization, schematic design, PCB layout and preliminary testing of a mixed-signal board. Trondheim: NTNU, Department of Electronics and Telecommunications 2015 312 s.
NTNU Untitled
 
45 Skjølsvik, Hallstein.
Ultra low voltage combinatorial logic building blocks. Trondheim: NTNU 2015 175 s.
NTNU Untitled
 
46 Talstad, Joar Nikolai.
Channel Filter Cross-Layer Optimization. Nordic Semiconductor / NTNU: NTNU, Department of Electronics and Telecommunications 2015
NTNU Untitled
 
47 Tørresen, Jim; Aunet, Snorre; Lande, Tor Sverre; Grutle, Øyvind Kallevik; Nielsen, Ivan R..
Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015. IEEE conference proceedings 2015 (ISBN 978-1-4673-6576-5) 275 s.
NTNU UiO Untitled
 
48 Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
Energy efficient sub/near-threshold ripple-carry adder in standard 65 nm CMOS. 6th Asia Symposium on Quality Electronic Design; 2015-08-04 - 2015-08-05
NTNU Untitled
 
49 Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
Energy efficient sub/near-threshold ripple-carry adder in standard 65 nm CMOS. I: Proceedings of the 6th Asia Symposium on Quality Electronic Design. IEEE conference proceedings 2015 ISBN 978-1-4673-7495-8. s. 7-12
NTNU Untitled
 
50 Vatanjou, Ali Asghar; Ytterdal, Trond; Aunet, Snorre.
Exploiting Short Channel Effects and Multi-Vt Technology for Increased Robustness and Reduced Energy Consumption, with Application to a 16-bit Subthreshold Adder Implemented in 65 nm CMOS. I: Proceedings, 2015 European Conference on Circuit Theory and Design. IEEE conference proceedings 2015 ISBN 978-1-4799-9877-7. s. -
NTNU Untitled
 
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