2007
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1. |
Gjermundnes, Øystein; Aas, Einar Johan. Exploiting Arithmetic Built-In Self-Test for Path Delay Testing. 12th IEEE European Test Symposium; 2007-05-20 - 2007-05-24 NTNU
Untitled
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2006
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2. |
Gjermundnes, Øystein. Exploiting Arithmetic Built-In Self-Test Techniques for Path Delay Fault Testing. : Norwegian University of Science and Technology 2006 (ISBN 82-471-8257-2) 164 s. NTNU
Untitled
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2005
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3. |
Gjermundnes, Øystein; Aas, Einar Johan. Design of a path delay fault simulator for evaluation of ABIST generated stimuli. I: 2005 PhD Research in Microelectronics and Electronics; Proceedings of the Conference. IEEE Press 2005 ISBN 0-7803-9345-7. s. 307-310 NTNU
Untitled
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4. |
Gjermundnes, Øystein; Aas, Einar Johan. Design of a path delay fault simulator for evaluation of ABIST generated stimuli. Ph.D. Research In Micro-Electronics & Electronics; 2005-07-25 - 2005-07-28 NTNU
Untitled
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5. |
Gjermundnes, Øystein; Aas, Einar Johan. Efficient stimuli generators for detection of path delay faults. 48th IEEE International Midwest Symposium on Circuits and Systems; 2005-08-07 - 2005-08-10 NTNU
Untitled
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6. |
Gjermundnes, Øystein; Aas, Einar Johan. Remote Path Delay Fault Simulation. I: 8th Euromicro Conference on Digital System Design (DSD'05). IEEE 2005 ISBN 0-7695-2433-8. s. 428-434 NTNU
Untitled
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7. |
Gjermundnes, Øystein; Aas, Einar Johan. Remote Path Delay Fault Simulation. 8th Euromicro Conference on Digital System Design (DSD'05); 2005-08-30 - 2005-09-03 NTNU
Untitled
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2003
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8. |
Gjermundnes, Øystein; Aas, Einar Johan. Prove and Improve - Experiences with Formal Property Verification. European Test Workshop 2003; 2003-05-28 NTNU
Untitled
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2002
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9. |
Gjermundnes, Øystein. Design and verification of a RSA encryption device. Trondheim, Norge: Institutt for fysikalsk elektronikk 2002 67 s. NTNU
Untitled
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